1. Field of the Invention
The present invention is generally in the field of semiconductors. More particularly, the present invention is in the field of one-time programmable semiconductor devices.
2. Background Art
One-time programmable (OTP) semiconductor devices are widely used, for example, to allow for post-fabrication design changes in integrated circuits (ICs). For instance, after device fabrication, but prior to commercial distribution, programming of a group of OTP devices embedded in a semiconductor die may be performed to provide a permanent serial number encoding for the die. Alternatively, in some applications a single OTP device may be programmed so as to permanently enable or disable a portion of an IC after device fabrication, and even after distribution of the IC to a customer. Although the functionality enabled by OTP devices is desirable, their conventional implementation is associated with drawbacks arising from added costs due to additional processing steps beyond those required for conventional transistor fabrication, as well as due to the circuit area needed to provide a separate sensing transistor, for example, to detect the programming state of the OTP device.
As a specific example, one conventional approach to implementing an OTP device utilizes a split-channel architecture, where the OTP device includes a laterally extended gate structure having two different gate dielectric thicknesses. The thinner portion of the gate dielectric provides the programming element of the OTP device. This thinner portion of gate dielectric can be made to destructively break down and form a conductive path from the extended gate to the underlying channel, thereby placing the conventional OTP device into a “programmed” state. This approach, however, requires that circuit area be dedicated to the programming element, to the transistor undergoing programming through use of the programming element, and to a separate sensing device for detecting the programmed state of the OTP device. In addition, this approach is substantially incompatible with emergent transistor architectures, such as the fin type field-effect transistor (FinFET) architecture contemplated for use at the 22 nm technology node and beyond.
Thus, there is a need to overcome the drawbacks and deficiencies in the art by providing a compact and reliable OTP device that is also compatible with FinFET fabrication process.